Low Power/Energy Compiler Optimizations

Embedded processor and SoCs are used in many devices, ranging from pace makers, sensors, phones, and PDAs, to general-purpose handheld computers and laptops. Each of these devices has their own requirements for performance, power dissipation, and energy usage, and typically implements a particular tradeoff among these entities. Allowing components of these devices to be controlled by software has opened up opportunities for compilation and operating strategies to reduce power dissipation and energy usage, at the potential cost of performance degradation. Such control includes (1) hibernation, i.e., initiating transitions of a component between a high power, active states and lower power, hibernating states, (2) dynamic frequency and voltage scaling, which allows the clock speed and supply voltage to be set explicitly within a range of feasible voltage and frequency combinations, and (3) remote task mapping, where power and energy is saved on a mobile device by executing a task remotely on a server. In this chapter, we discuss general issues and challenges related to compilers for power and energy management. A set of compilation strategies will be further